JPH0445244Y2 - - Google Patents
Info
- Publication number
- JPH0445244Y2 JPH0445244Y2 JP1985147747U JP14774785U JPH0445244Y2 JP H0445244 Y2 JPH0445244 Y2 JP H0445244Y2 JP 1985147747 U JP1985147747 U JP 1985147747U JP 14774785 U JP14774785 U JP 14774785U JP H0445244 Y2 JPH0445244 Y2 JP H0445244Y2
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- electrode terminal
- semiconductor chip
- substrate
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985147747U JPH0445244Y2 (en]) | 1985-09-27 | 1985-09-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985147747U JPH0445244Y2 (en]) | 1985-09-27 | 1985-09-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6255348U JPS6255348U (en]) | 1987-04-06 |
JPH0445244Y2 true JPH0445244Y2 (en]) | 1992-10-23 |
Family
ID=31061393
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985147747U Expired JPH0445244Y2 (en]) | 1985-09-27 | 1985-09-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0445244Y2 (en]) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2705658B2 (ja) * | 1994-08-31 | 1998-01-28 | 日本電気株式会社 | 電子デバイス組立体およびその製造方法 |
KR20050084536A (ko) * | 1997-04-17 | 2005-08-26 | 세키스이가가쿠 고교가부시키가이샤 | 도전성 미립자의 제조장치, 그 제조장치를 이용한 도전성미립자의 제조방법, 그 제조장치를 이용하여 이루어지는전자회로부품 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5120941A (ja) * | 1974-08-14 | 1976-02-19 | Seikosha Kk | Dodenseisetsuchakuzai |
JPS5431566A (en) * | 1977-08-12 | 1979-03-08 | Nippon Kokuen Kogyo Kk | Way of connecting large scale integrated circuit to current carrying circuit portions on insulated substrate |
-
1985
- 1985-09-27 JP JP1985147747U patent/JPH0445244Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6255348U (en]) | 1987-04-06 |
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